The present invention relates generally to integrated circuit packaging and, more particularly, to lead frame based packages for semiconductor devices.
Certain semiconductor packages, such as quad flat packages (QFP), quad flat no-lead (QFN) packages, and power QFN (PQFN) packages, include one or more integrated circuit (IC) dies and/or other active components physically attached to a lead frame and electrically connected to the lead frame with bond wires spanning from bond pads on the die to corresponding leads of the lead frame. The IC dies, the bond wires, and an interior portion of the lead frame are encapsulated by a mold compound, leaving a portion of each lead exposed. These exposed portions serve as input and output (I/O) connections to the encapsulated IC dies and are typically located around the periphery of the QFP package. Compared to other types of semiconductor packages, QFP packages advantageously provide shorter electrical paths and faster signal communication rates and are therefore widely used for power elements and other IC dies.
In some QFP packages, connections between bond pads on the IC dies and a power source are made with one or more dedicated power bars, which serve as hubs, disposed within the QFP package. In these configurations, a plurality of leads of the lead frame, referred to as dummy leads, are electrically coupled to the power bars and the power bars are then electrically connected to one or more of the IC bond pads. However, such use of QFP package leads as dummy leads reduces the total number of leads available for input/output (I/O) interconnection. Thus, it would be advantageous to reduce or eliminate the need for such dummy leads.